AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 97
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
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Figure 16-20. MMC Controller Interrupt System
16.8
4173E–USB–09/07
Registers
MMINT.7
MMINT.6
MMINT.5
MMINT.4
MMINT.3
MMINT.2
MMINT.1
MMINT.0
MCBI
EORI
EOCI
EOFI
F2FI
F1FI
F2EI
F1EI
The interrupt request is generated each time an unmasked flag is set, and the global MMC con-
troller interrupt enable bit is set (EMMC in IEN1 register).
Reading the MMINT register automatically clears the interrupt flags (acknowledgment). This
implies that register content must be saved and tested interrupt flag by interrupt flag to be sure
not to overlook any interrupts.
Table 78. MMCON0 Register
MMCON0 (S:E4h) – MMC Control Register 0
Number
DRPTR
MMMSK.6
MMMSK.4
MMMSK.2
MMMSK.0
EORM
Bit
EOFM
F1EM
F1FM
7
7
Mnemonic Description
MMMSK.7
MMMSK.5
MMMSK.3
MMMSK.1
DTPTR
DRPTR
MCBM
EOCM
F2FM
F2EM
Bit
6
Data Receive Pointer Reset Bit
Set to reset the read pointer of the data FIFO.
Clear to release the read pointer of the data FIFO.
CRPTR
5
CTPTR
4
EMMC
IEN1.0
MBLOCK
3
MMC Interface
Interrupt Request
DFMT
2
AT89C5132
RFMT
1
CRCDIS
0
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