AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 60

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

14. Audio Output Interface
14.1
Figure 14-1. Audio Interface Block Diagram
14.2
60
Description
Clock Generator
AT89C5132
Audio Data
From C51
CLOCK
AUD
AUDCON1.0
AUDEN
8
The AT89C5132 implement an audio output interface allowing the audio bitstream to be output
in various formats. It is compatible with right and left justification PCM and I
thanks to the on-chip PLL (see Section “Clock Controller”, page 12) allows connection of almost
all of the commercial audio DAC families available on the market.
The C51 core interfaces to the audio interface through five special function registers: AUDCON0
and AUDCON1, the Audio Control registers (see Table 51 and Table 52); AUDSTA, the Audio
Status register (see Table 53); AUDDAT, the Audio Data register (see Table 54); and AUDCLK,
the Audio Clock Divider register (see Table 55).
Figure 14-1 shows the audio interface block diagram, blocks are detailed in the following
sections.
The audio interface clock is generated by division of the PLL clock. The division factor is given
by AUCD4:0 bits in AUDCLK register. Figure 14-2 shows the audio interface clock generator
and its calculation formula. The audio interface clock frequency depends on the audio DAC
used.
Audio Buffer
AUDCON1.2:1
AUDDAT
Data Ready
DUP1:0
AUDCON0.0
HLR
Clock Generator
AUBUSY
AUDSTA.7
AUDSTA.6
AUDSTA.5
SREQ
UDRN
AUDCON0.1
DSIZ
16
Data Converter
AUDCON0.7:3
JUST4:0
AUDCON0.2
POL
0
1
2
SCLK
DCLK
DSEL
DOUT
S formats and
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