AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 167
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
23.3.4.2
4173E–USB–09/07
Waveforms
(INPUT/OUTPUT)
(INPUT/OUTPUT)
SDA
SCL
V
Notes:
Figure 23-16. Two Wire Waveforms
DD
START or Repeated START condition
T
T
T
T
= 2.7 to 3.3 V, T
T
T
T
Symbol
SU
SU
SU
SU
HD
HD
SU
T
T
T
T
; DAT1
; DAT2
; DAT3
T
T
T
HIGH
; STO
LOW
; DAT
; STA
; STA
BUF
RC
RD
FC
FD
1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-up resistor, this
3. Spikes on the SDA and SCL lines with a duration of less than 3·T
4. T
T
hd
must be < 1 µs.
mum capacitance on bus-lines SDA and
SCL= 400 pF.
;STA
CLCL
T
fd
= T
Start condition hold time
SCL low time
SCL high time
SCL rise time
SCL fall time
Data set-up time
SDA set-up time (before repeated START condition)
SDA set-up time (before STOP condition)
Data hold time
Repeated START set-up time
STOP condition set-up time
Bus free time
SDA rise time
SDA fall time
T
OSC
low
A
= one oscillator clock period.
= -40 to +85°C
T
T
rd
high
T
rc
Tsu;DAT1
Parameter
T
hd;
DAT
T
fc
STOP condition
Repeated START condition
Tsu;DAT
T
su;
DAT3
14·T
16·T
14·T
14·T
14·T
14·T
INPUT
250 ns
250 ns
250 ns
0.3 µs
0.3 µs
2
CLCL
T
Max
1 µs
0 ns
1 µs
Min
T
0.3 V
su
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
su
0.7 V
;STO
;STA
will be filtered out. Maxi-
AT89C5132
(4)
(4)
(4)
(4)
(4)
(4)
DD
DD
T
buf
START condition
20·T
8·T
OUTPUT
8·T
CLCL
4.0 µs
4.7 µs
4.0 µs
0.3 µs
4.7 µs
4.0 µs
4.7 µs
0.3 µs
CLCL
1 µs
Max
0.7 V
Min
CLCL
-
-
0.3 V
(2)
(4)
(2)
(4)
(1)
(1)
(1)
(1)
(3)
(1)
(1)
(1)
(3)
- T
- T
(4)
DD
DD
FC
RD
167