AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 50
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
Available stocks
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Figure 12-1. Timer 0 and Timer 1 Clock Controller and Symbols
12.3
12.3.1
Figure 12-2. Timer/Counter x (x = 0 or 1) in Mode 0
50
Timer 0
AT89C5132
Mode 0 (13-bit Timer)
CLOCK
INTx
CLOCK
CLOCK
TIMx
OSC
Tx
PER
TMOD Reg
Timer 0 Clock Symbol
GATEx
CLOCK
÷ 6
TIM0
÷
2
Timer 0 functions as either a Timer or event Counter in four modes of operation. Figure 12-2
through Figure 12-8 show the logical configuration of each mode.
Timer 0 is controlled by the four lower Bits of TMOD register (see Table 41) and Bits 0, 1, 4 and
5 of TCON register (see Table 40). TMOD register selects the method of Timer gating (GATE0),
Timer or Counter operation (C/T0#) and mode of operation (M10 and M00). TCON register pro-
vides Timer 0 control functions: overflow flag (TF0), run control bit (TR0), interrupt flag (IE0) and
interrupt type control bit (IT0).
For normal Timer operation (GATE0 = 0), setting TR0 allows TL0 to be incremented by the
selected input. Setting GATE0 and TR0 allows external pin INT0 to control Timer operation.
Timer 0 overflow (count rolls over from all 1s to all 0s) sets TF0 flag generating an interrupt
request.
It is important to stop Timer/Counter before changing mode.
Mode 0 configures Timer 0 as a 13-bit Timer which is set up as an 8-bit Timer (TH0 register) with
a modulo 32 prescaler implemented with the lower five Bits of TL0 register (see Figure 12-2).
The upper three Bits of TL0 register are indeterminate and should be ignored. Prescaler over-
flow increments TH0 register. Figure 12-3 gives the overflow period calculation formula.
Figure 12-3. Mode 0 Overflow Period Formula
TMOD Reg
C/Tx#
CKCON.1
TCON Reg
T0X2
0
1
0
1
TRx
Timer 0 Clock
TFx
PER
(5 Bits)
TLx
=
CLOCK
CLOCK
OSC
PER
6
⋅
(16384 – (THx, TLx))
Timer 1 Clock Symbol
F
(8 Bits)
TIMx
THx
CLOCK
TIM1
÷
2
Overflow
CKCON.2
T1X2
0
1
TCON Reg
TFx
Timer 1 Clock
Timer x
Interrupt
Request
4173E–USB–09/07