AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 20

• Manufacturer Part Number: AT89C5132
• Manufacturer: Atmel Corporation

Specifications of AT89C5132

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-12C
• Max I/o Pins: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Uart: 1
• Adc Channels: 2
• Adc Resolution (bits): 10
• Adc Speed (ksps): 22.7
• Sram (kbytes): 2.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 2
• Isp: UART/USB
• Watchdog: Yes

7.3.4
7.4
7.5
20
Registers
Hardware Bytes
AT89C5132
Preventing Flash Corruption
See
Table 6. AUXR1 Register
AUXR1 (S:A2h) – Auxiliary Register 1
Reset Value = XXXX 00X0b
Table 7. HSB Byte – Hardware Security Byte
Bit Number
Bit Number
7 - 6
X2B
5 - 4
“Reset Recommendation to Prevent Flash Corruption” on page
7
5
4
3
2
1
0
7
7
6
3
-
Mnemonic
Mnemonic
ENBOOT
BLJB
X2B
BLJB
DPS
GF3
Bit
Bit
6
6
0
-
-
-
-
-
-
(1)
(2)
Description
X2 Bit
Program this bit to start in X2 mode.
Unprogram (erase) this bit to start in standard mode.
Boot Loader Jump Bit
Program this bit to execute the boot loader at address F000h on next reset.
Unprogram (erase) this bit to execute user’s application at address 0000h on next reset.
Reserved
The value read from these bits is always unprogrammed. Do not program these bits.
Reserved
The value read from this bit is always unprogrammed. Do not program this bit.
Description
Reserved
The values read from these Bits are indeterminate. Do not set these Bits.
Enable Boot Flash
Set this bit to map the boot Flash in the code space between at addresses F000h to
FFFFh.
Clear this bit to disable boot Flash.
Reserved
The values read from this bit is indeterminate. Do not set this bit.
General Flag
This bit is a general-purpose user flag.
Always Zero
This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag.
Reserved for Data Pointer Extension.
Data Pointer Select Bit
Set to select second data pointer: DPTR1.
Clear to select first data pointer: DPTR0.
ENBOOT
5
5
-
4
4
-
-
GF3
3
3
-
LB2
2
0
2
45.
LB1
1
1
-
4173E–USB–09/07
DPS
LB0
0
0