AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 127
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
Available stocks
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19.3.6
4173E–USB–09/07
Slave Mode with Polling Policy
Figure 19-10. Master SPI Interrupt Policy Flows
Figure 19-11 shows the initialization phase and the transfer phase flows using the polling policy.
The transfer format depends on the master controller.
SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the “end of recep-
tion” check).
This policy provides the fastest effective transmission and is well adapted when communicating
at high speed with other Microcontrollers. However, the procedure may be interrupted at any
time by higher priority tasks.
Program CPOL & CPHA
Select Master Mode
Write Data in SPDAT
SPI Initialization
Interrupt Policy
Enable Interrupt
Program SPR2:0
Select Bit Rate
Select Format
Start Transfer
Select Slave
Enable SPI
MSTR = 1
SPEN = 1
ESPI =1
Pn.x = L
Write Data in SPDAT
Get Data Received
Start New Transfer
Service Routine
Disable Interrupt
Last Transfer?
Deselect Slave
SPI Interrupt
Read SPSTA
Read SPDAT
Read Status
Pn.x = H
SPIE = 0
AT89C5132
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