AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 95
AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
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16.6.4.3
Figure 16-18. Data Stream Reception Flows
4173E–USB–09/07
Data Reading
read 8 data from MMDAT
a. Polling Mode
STOP Command
F1FI or F2FI = 1?
Data Stream
FIFO Reading
No More Data
To Receive?
Reception
FIFO Full?
Send
the user may reset the data controller and its internal state machine by setting and clearing the
DCR bit in MMCON2 register.
This time-out may be disarmed after receiving 8 data (F1FI flag set) or after receiving end of
frame (EOFI flag set) in case of block length less than 8 data (1, 2 or 4).
Data is read from the FIFO by reading to MMDAT register. Each time one FIFO becomes full
(F1FI or F2FI set), user is requested to flush this FIFO by reading 8 data.
Unmask FIFOs Full
Data Stream
Initialization
F1FM = 0
F2FM = 0
b. Interrupt Mode
read 8 data from MMDAT
STOP Command
Reception ISR
F1FI or F2FI = 1?
Mask FIFOs Full
Data Stream
FIFO Reading
No More Data
To Receive?
FIFO Full?
F1FM = 1
F2FM = 1
Send
AT89C5132
95
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