mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 117
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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TAS
Operation:
Assembler Syntax: TAS <ea>x
Attributes:
Description: Tests and sets the byte operand addressed by the effective address field. The
instruction tests the current value of the operand and sets the N and Z condition code bits
appropriately. TAS also sets the high-order bit of the operand. The operand uses a
read-modify-write memory cycle that completes the operation without interruption. This
instruction supports use of a flag or semaphore to coordinate several processors.
Condition Codes:
Instruction Fields:
Instruction
Format:
—
X
• Effective address field—specifies the destination location; the possible data alterable
Addressing Mode
addressing modes are listed in the table below.
N
∗
(d
(Ax) +
– (Ax)
(Ax)
16
Dx
Ax
,Ax)
15
Z
∗
0
Operand sizes supported
14
1
V
0
Opcode present
Destination Tested → CCR; 1 → bit 7 of Destination
Size = byte
Mode
13
010
011
100
101
0
—
—
TAS
C
0
12
0
reg. number:Ax
reg. number:Ax
reg. number:Ax
reg. number:Ax
X Not affected
N Set if the msb of the operand is currently set; cleared otherwise
Z Set if the operand was zero; cleared otherwise
V Always cleared
C Always cleared
Register
11
Chapter 2. ColdFire Core
1
Test and Set an Operand
—
—
10
0
ColdFire Instruction Set Architecture Enhancements
1
9
V2, V3 Core
Addressing Mode
0
8
No
(d
(d
—
(d
#<data>
(xxx).W
(xxx).L
8
8
1
7
16
,PC,Xi)
,Ax,Xi)
,PC)
1
6
5
Mode
MODE
110
111
111
EFFECTIVE ADDRESS
—
—
—
4
V4 Core
Yes
.b
3
reg. number:Ax
Register
000
001
2
—
—
—
REGISTER
TAS
1
2-51
0
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