mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 184

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Background Debug Mode (BDM)
5.5.3.1.1 Extension Words as Required
Some commands require extension words for addresses and/or immediate data. Addresses
require two extension words because only absolute long addressing is permitted. Longword
accesses are forcibly longword-aligned and word accesses are forcibly word-aligned.
Immediate data can be 1 or 2 words long. Byte and word data each requires a single
extension word and longword data requires two extension words.
Operands and addresses are transferred most-significant word first. In the following
descriptions of the BDM command set, the optional set of extension words is defined as
address, data, or operand data.
5.5.3.2 Command Sequence Diagrams
The command sequence diagram in Figure 5-19 shows serial bus traffic for commands.
Each bubble represents a 17-bit bus transfer. The top half of each bubble indicates the data
the development system sends to the debug module; the bottom half indicates the debug
module’s response to the previous development system commands. Command and result
transactions overlap to minimize latency.
5-28
7–6
5–4
3
2–0
Bit
Operand
Size
00
A/D
Register
Name
Operand data size for sized operations. Addresses are expressed as 32-bit absolute values.
Note that a command performing a byte-sized memory read leaves the upper 8 bits of the
response data undefined. Referenced data is returned in the lower 8 bits of the response.
00 Byte
01 Word
10 Longword
11 Reserved
Reserved
Address/data. Determines whether the register field specifies a data or address register.
0 Indicates a data register.
1 Indicates an address register.
Contains the register number in commands that operate on processor registers.
Table 5-22. BDM Field Descriptions (Continued)
Operand Size
Bit Values
8 bits
16 bits
32 bits
—
MCF5407 User’s Manual
Description