mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 297
mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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Accesses in synchronous burst page mode always cause the following sequence:
11.4.4.4 Continuous Page Mode
Continuous page mode is identical to burst page mode, except that it allows the processor
core to handle successive bus cycles that hit the same page without having to close the page.
When the current bus cycle finishes, the MCF5407 core internal pipelined bus can predict
whether the upcoming cycle will hit in the same page.
RAS[0] or [1]
1.
2.
3. Required number of
4. Some transfers need more
5.
6. Required number of idle clocks inserted to assure precharge-to-
• If the next bus cycle is not pending or misses in the page, the
CAS[3:0]
DRAMW
D[31:0]
A[31:0]
CLKIN
SRAS
SCAS
ACTV
NOP
NOP
given port size.
PALL
generated to the SDRAM.
commands to assure SRAS-to-SCAS delay (if CAS latency is 1, there are no
commands).
command
command
ACTV
t
CASL
Chapter 11. Synchronous/Asynchronous DRAM Controller Module
Row
= 2
NOP
Figure 11-19. Burst Write SDRAM Access
READ
Column
NOP
or
WRITE
Column
commands to assure the
WRITE
commands to service the transfer size with the
Column
t
RWL
NOP
Column
ACTV
PALL
-to-precharge delay.
Synchronous Operation
PALL
ACTV
t
command is
RP
delay.
11-29
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