dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 126

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

t
t
t
t
t
t
t
t
t
t
t
t
t
5 0 Device Specifications
Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2 Both specifications refer to the CLK-OUT falling edge after WR-PEND rising See Section 4 2 6 RIAS remote rest time
SU-BR-RR-CO
H-BR
SU-LR-RR-CO
H-LR
SU-SBW-RW-CO
H-SBW
SU-FBW-RW-CO
H-FBW
SU-LW-RW-CO
H-LW
SU-LW-RWR-COa
SU-LW-RWR-COb
PD-CO-WP
Symbol
ID
10
11
12
13
1
2
3
4
5
6
7
8
9
REM-RD Rising before CLK-OUT Rising
(Buffered Read Mode)
CLK-OUT Rising after REM-RD Rising to REM-RD
or REM-WR Falling (Buffered Read Mode)
REM-RD Rising before CLK-OUT Rising
(Latched Read Mode)
CLK-OUT Rising after REM-RD Rising to REM-RD
or REM-WR Falling (Latched Read Mode)
REM-WR Rising before CLK-OUT Rising
(Slow Buffered Write Mode)
CLK-OUT Rising after REM-WR Rising to REM-RD or
REM-WR Falling (Slow Buffered Write Mode)
REM-WR Rising before CLK-OUT Rising
(Fast Buffered Write Mode)
CLK-OUT Rising after REM-WR Rising to REM-RD or
REM-WR Falling (Fast Buffered Write Mode)
REM-WR Rising before CLK-OUT Rising
(Latched Write Mode)
CLK-OUT Rising after REM-WR Rising to REM-RD
or REM-WR Falling (Latched Write Mode)
REM-WR orREM-RD Falling to CLK-OUT Falling
(Latched Write Mode) (Note 2)
CLK-OUT Rising to REM-WR or REM-RD rising
(Latched Write Mode) (Note 2)
CLK-OUT rising to WR-PEND Rising
TABLE 5-26 Remote Rest Time (Note 1)
(Continued)
Parameter
126
Formula
T
T
T
T
a
a
a
a
T
H
T
T
T
T
a
H
H
H
H
a
a
a
a
Min
b
19
10
16
10
22
10
22
10
20
10
7
8
1
Max
21
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns