dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 155
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dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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Figure 6-1
6 0 Reference Section
XOR Exclusive OR Immediate
Syntax
XOR n rsd
Affected Flags
N Z
Description
Logically exclusive ORs the immediate value n to the regis-
ter rsd and places the result back into the register rsd Note
that only the active registers R0 – R15 may be specified for
rsd The value of n is 8 bits wide
Example
Encode decode a data byte in register 15
Instruction Format
T-states
2
Bus Timing
Operation
rsd XOR n
0
15
XOR code pattern R15
Opcode
1
1
x
0
rsd
11
immediate limited register
n
encode decode
(Continued)
3
rsd
0
155
XORA Exclusive OR with Accumulator
Syntax
XORA
XORA
Affected Flags
N Z
Description
Logically exclusive ORs the source register Rs to the active
accumulator and places the result into the destination speci-
fied The destination may be either a register Rd or data
memory via an index register mode mlr Note that register
bank selection determines which accumulator is active
Example
Decode the data byte just received and place it into data
memory This example assumes that the accumulator con-
tains the ‘‘key’’ and that the index register IY points to the
location where the information should be stored
Instruction Format
XORA Rs Rd
T-states
XORA Rs Rd
XORA Rs mlr
Bus Timing
XORA Rs Rd
XORA Rs mlr
Operation
XORA Rs Rd
Rs XOR accumulator
XORA Rs mlr
Rs XOR accumulator
XORA Rs mlr
1
15
EXX
XORA
1
Opcode
1
Rs Rd
Rs mlr
1 1
RTR IY
1
1
a
0
Figure 6-1
Figure 6-7
2
3
x
x
register register
register indexed
9
Rd
data memory
select alternate banks
decode received byte and
save it
Rd
4
TL F 9336 – 18
Rs
0
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