dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 68

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

Figure 4-9 shows the timing of Remote Reads via a buffer
(a) and a latch (b) (called a Buffered Read and Latched
4-9(b) XACK rises at the same time but the Termination
4 0 Remote Interface and Arbitration System (RIAS)
In addition WAIT can delay the rising edge of XACK indefi-
nitely One T-state after XACK rises
be active on AD Timing is similar for a Remote Write AD is
in TRI-STATE while LCL is high LCL is asserted for a mini-
mum of three T-states but can be extended by instruction
wait states and the WAIT pin IWR clocks the instruction
into memory during the write of the high byte The Instruc-
tion Address (PC) is incremented about one T-state after
LCL falls on a high byte access for both Remote Reads and
Writes
Soft-loading Instruction Memory is accomplished by first
setting the BCP Program Counter to the starting address of
the program to be loaded The Memory Select bits are then
set to IMEM BCP instructions can then be moved from the
Remote Processor to the BCP low byte high byte until
the entire program is loaded
4 1 3 Interface Modes
The Remote Interface and Arbitration System will support
TRI-STATE buffers or latches between the Remote Proces-
sor and the BCP The choice between buffers and latches
depends on the type of system that is being interfaced to
Latches will help prevent the faster system from slowing to
the speed of the slower system Buffers can be used if the
Remote Processor (RP) requires that data be handshaked
between the systems
Read) The main difference in these modes is in the Termi-
nation Phase The Buffered Read handshakes the data
back to the RP When the BCP deasserts XACK data is
valid and the RP can deassert REM-RD Only after REM-RD
goes high is LCL removed In the Latched Read Figure
Phase completes without waiting for the rising edge of
REM-RD One half T-state after XACK rises INT-READ ris-
(a) Buffered Read
RIC will once again
FIGURE 4-9 Read from Remote Processor
TL F 9336 – 91
68
es and one half T-state later LCL falls The BCP can use the
buses one T-state after LCL falls The minimum time (no
wait states no arbitration delay) the BCP CPU could be pre-
vented from using the bus is four T-states in the Latched
Read Mode
A Buffered Read prevents the BCP CPU from using the bus
during the time RP is allocated the buses This time period
begins when LCL rises and ends when REM-RD is re-
moved If the REM-RD is asserted longer than the minimum
Buffered Read execution time (four T-states) then the BCP
may be unnecessarily prevented from using the buses
Therefore if there are no overriding reasons to use the Buff-
ered Read Mode the Latched Read Mode is preferable
There are three Remote Write Modes two require buffers
and one requires latches The timing for the writes utilizing
buffers is shown in Figure 4-10 The Slow Buffered Write (a)
is handshaked in the same manner as the Buffered Read
and thus has the same timing The Fast Buffered Write has
similar timing to the Latched Read This timing similarity ex-
ists because the BCP terminates the remote access without
waiting for the RP to deassert REM-WR
In both cases XACK falls a short delay after REM-WR falls
and LCL rises when the RP is given the buses One T-state
after LCL rises INT-WRITE falls The termination in the
Slow Buffered Write mode keys off REM-WR rising as
shown in Figure 4-10(a) INT-WRITE rises a prop-delay later
and LCL falls one T-state later The Fast Buffered Write
shown in Figure 4-10(b) begins the Termination Phase with
the rising edge of XACK INT-WRITE rises at the same time
as XACK and LCL falls one T-state later The BCP can
begin a local access one T-state after LCL transitions
A Fast Buffered Write is preferable to the Slow Buffered
Write if RP’s write cycles are slow compared to the mini-
mum Fast Buffered Write execution time The Fast Buffered
Write assumes though that data is available to the BCP by
the time INT-WRITE rises
(Continued)
(b) Latched Read
TL F 9336 – 92