dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 60
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dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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3 0 Transceiver
The cable shield must be continuous throughout the trans-
mission system and be grounded at the system unit and
each station Since twinax connectors have exposed metal
connected to their shield grounds care must be taken not to
expose them to noise sources The polarity of the two inner
conductors must also be maintained throughout the trans-
mission system
The transmission system is implemented in a balanced cur-
rent mode every receiver transmitter pair is directly cou-
pled to the twinax at all times Data is impressed on the
transmission line by unbalancing the line voltage with the
driver current The system requires passive termination at
both ends of the transmission line The termination resist-
ance value is given by
In practice termination is accomplished by connecting both
conductors to the shield via 54 9X 1% resistors hence the
characteristic impedance of the twinax cable of 107X
at 1 0 MHz Intermediate stations must not terminate the
line each is configured for ‘‘pass-through’’ instead of ‘‘ter-
minate’’ mode Stations do not have to be powered on to
pass twinax signals on to other stations all of the receiver
transmitter pairs are DC coupled Consequently devices
must never output any signals on the twinax line during pow-
er-up or down that could be construed as data or interfere
with valid data transmission between other devices
Switch Open
Switch Closed
B
D
A
R
R
Z
f To 2 1 1 Transformer
f From DP8344 Outputs
f To 2 1 1 Transformer
O
t
t
e
Termination Resistance
Characteristic Impedance
Z
O 2
where
Twisted Pair
Legend
Legend
Coax
(Continued)
FIGURE 3-14 BCP Coax Twisted Pair Front End
FIGURE 3-13 BCP Driver Design
g
5%
60
Driver Circuits for the DP8344B
The transmitter interface on the DP8344B is sufficiently
general to allow use in 3270 5250 and 8-bit transmission
systems Because of this generality some external hard-
ware is needed to adapt the outputs to form the signals
necessary to drive the twinax line The chip provides three
signals DATA-OUT DATA-DLY and TX-ACT DATA-OUT is
biphase serial data (inverted) DATA-DLY is the biphase se-
rial data output (non-inverted) delayed one-quarter bit-time
TX-ACT or transmitter active signals that serial data is be-
ing transmitted when asserted DATA-OUT and DATA-DLY
can be used to form the A and B phase signals with their
three levels by the circuit shown in Figure 3-15 TX-ACT is
used as an external transmitter enable The BCP can invert
the sense of the DATA-OUT and DATA-DLY signals by as-
serting TIN
5250 type biphase data to be generated and or utilization
of inverting on non-inverting transmitter stages
Drivers for the 5250 environment may not place any signals
on the transmission system when not activated The power-
on and off conditions of drivers must be prevented from
causing noise on the system since other devices may be in
operation Figure 3-15 shows a ‘‘DC power good’’ signal
enabling the driver circuit This signal will lock out conduc-
tion in the drivers if the supply voltage is out of tolerance
Twinax signals can be viewed as consisting of two distinct
phases phase A and phase B each with three levels off
TMR 3
This feature allows both 3270 and
TL F 9336 – G2
TL F 9336 – G3
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