peb22504 Infineon Technologies Corporation, peb22504 Datasheet - Page 30

• Manufacturer Part Number: peb22504
• Description: Quad Line Interface Unit For E1dt1dj1 Quadliu
• Manufacturer: Infineon Technologies Corporation

3.3
3.3.1
The communication between the CPU and the QuadLIU™ is done via a set of directly
accessible registers. The interface may be configured as Intel or Motorola type (by
control pin MODE) with a data bus width of 8 bits.
The CPU transfers data to/from the QuadLIU™, sets the operating modes, controls
function sequences, and gets status information by writing or reading control/status
registers.
used to control the interface type. Switching of ALE allows the QuadLIU™ to be
connected directly to a multiplexed address/data bus.
Table 5
ALE
V
V
switching
3.3.1.1
Special events in the QuadLIU™ are indicated by means of a single interrupt output,
which requests the CPU to read status information from the QuadLIU™, or to transfer
data to the QuadLIU™. The pin characteristic (open drain, push-pull) is programmable.
Since only one INT request output is provided, the cause of an interrupt must be
determined by the CPU by reading the QuadLIU™’s interrupt status registers CIS and
ISR(1:0). The interrupt on pin INT and the interrupt status bits are reset by reading the
interrupt status registers. Registers ISR0 and ISR1 are “cleared on read“.
The structure of the interrupt status registers is shown in
Data Sheet
SS
SS
or V
or V
DD
DD
Table 5
Functional Blocks
Microprocessor Control Unit
Interrupt Interface
MODE
high
low
low
Selectable Bus and Microprocessor Interface Configuration
shows how the ALE (Address Latch Enable) and MODE lines are
Microprocessor interface
Motorola
Intel
Intel
30
Figure
Bus Structure
demultiplexed
demultiplexed
multiplexed
Functional Description
6.
QuadLIU V1.1
PEB 22504
2001-02