peb22504 Infineon Technologies Corporation, peb22504 Datasheet - Page 61

• Manufacturer Part Number: peb22504
• Description: Quad Line Interface Unit For E1dt1dj1 Quadliu
• Manufacturer: Infineon Technologies Corporation

FSC(1:0)
R1S(1:0)
Global Configuration Register 2 (Read/Write)
Address: 20
Value after reset: 00
GCR2
GCR2.7
GCR2.6
IC(1:0)
PMOD(4:1)
Data Sheet
H
7
0
FSC Source
One of the four internally generated de-jittered 8-kHz clocks is output
on port FSC.
00 = Sourced by channel 1 (default)
01 = Sourced by channel 2
10 = Sourced by channel 3
11 = Sourced by channel 4
RCLK1 Source
One of the four internally generated receive route clocks is output on
port RCLK1 (available for RCLK1 only, not for RCLK(2:4)).
00 = Extracted receive clock of channel 1 (default)
01 = Extracted receive clock of channel 2
10 = Extracted receive clock of channel 3
11 = Extracted receive clock of channel 4
Note: Unused bits have to be cleared.
reserved
reserved
Interrupt Pin Control
x0 = Open drain, active low (default)
01 = Push-pull, active low
11 = Push-pull, active high
E1 or T1/J1 Mode of channel (4:1)
0 =
1 =
H
0
E1 mode (default)
T1/J1 mode
IC1
IC0
61
PMOD4 PMOD3 PMOD2 PMOD1
Register Description
QuadLIU V1.1
0
PEB 22504
2001-02