peb22504 Infineon Technologies Corporation, peb22504 Datasheet - Page 56

• Manufacturer Part Number: peb22504
• Description: Quad Line Interface Unit For E1dt1dj1 Quadliu
• Manufacturer: Infineon Technologies Corporation

5
5.1
The QuadLIU™ can be operated in one of two modes, which is either E1 mode or T1/J1
mode.
The device is programmable via a microprocessor interface which enables byte access
to all control and status registers.
The QuadLIU™ must be initially programmed after reset. General guidelines for
initialization are described in
The status registers are read-only and are updated continuously. Usually the processor
reads the status registers periodically to analyze the alarm status.
SIgnals (for example RL1/2 receive line) should not be applied before the device is
powered up.
5.2
The QuadLIU™ is forced to the reset state if a low signal is input on pin RES (for
minimum period, see
active clock on pin MCLK. All output stages are in a high-impedance state, all internal
flip-flops are reset, and most of the control registers are initialized to default values.
After reset, the device is initialized to E1 operation.
5.3
5.3.1
After reset, the QuadLIU™ is initialized with register values listed in
Table 11
Register
GCR
GCR2
LIM0
LIM1
LIM2
Data Sheet
Operational Description
Operational Overview
Device Reset
Device Initialization
Reset Values
Reset Value Meaning
80
00
00
00
40
Initial Values after Reset
H
H
H
H
H
“Reset” on page
FSC is sourced by channel 1,
RCLK1 clock source: Channel 1
E1 mode for all four channels,
INT function is open drain
AMI coding
Power up
LOS threshold -20 dB, receive threshold 55%
“Basic Initialization Settings” on page
105). During reset, the QuadLIU™ needs an
56
Operational Description
Table
QuadLIU V1.1
57.
PEB 22504
11.
2001-02