peb22504 Infineon Technologies Corporation, peb22504 Datasheet - Page 86

• Manufacturer Part Number: peb22504
• Description: Quad Line Interface Unit For E1dt1dj1 Quadliu
• Manufacturer: Infineon Technologies Corporation

Global Clock Mode Register 5 (Read/Write)
Address: 5E
Value after reset: 00
GCM5
MCLK_LOW
PLL_M(0:4)
Global Clock Mode Register 6 (Read/Write)
Address: 5F
Value after reset: 00
GCM6
PLL_N(0:4)
Data Sheet
MCLK_
LOW
H
H
7
7
Master Clock Range Low
0 =
1 =
PLL Dividing Factor M
For details, see
Note: Write operations to GCM5 initiate a PLL reset (see below).
PLL Dividing Factor N
For details, see
Note: Write operations to GCM6 initiate a PLL reset (see below).
H
H
Master clock frequency divided by (PLL_M + 1) is greater than
or equal to 1.5 MHz
Master clock frequency divided by (PLL_M + 1) is less than
1.5 MHz
“Flexible Clock Mode
“Flexible Clock Mode
PLL_M
PLL_N
4
4
86
PLL_M
PLL_N
3
3
PLL_M
PLL_N
2
2
Settings” on
Settings” on
PLL_M
PLL_N
1
1
Register Description
QuadLIU V1.1
PLL_M
page
page
PLL_N
0
0
0
0
PEB 22504
87.
87.
2001-02