ia186em Innovasic Semiconductor Inc., ia186em Datasheet - Page 144

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ia186em

Manufacturer Part Number
ia186em
Description
8-bit/16-bit Microcontrollers
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Description:
bring the CPU out of the halt state.
Workaround:
Errata No. 6
Problem:
Description:
Workaround:
Errata No. 7
Problem:
between the AMD part and the Innovasic part.
Description:
part will occasionally drive a handshake signal to the incorrect state during bus hold instead of
tristating the pin.
Workaround:
operation with the Innovasic part UARTs.
Does not clear the interrupt
How hardware handshaking for UARTs during a bus hold cycle is handled differently
When device is in halt state, the interrupt caused by a DMA completion will not
The interrupt bit for INT0 is not cleared until the interrupt routine is complete.
In the AMD part, hardware handshaking works per the data sheet. The Innovasic
Use idle mode instead of halt.
Do not rely on the bit to be cleared when nesting interrupts.
None. Avoid using hardware handshaking in conjunction with the bus hold
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Page 144 of 145
bit for INT0 upon entering the ISR.
IA211050831-16
December 24, 2008
http://www.Innovasic.com
Customer Support:
Data Sheet
1-888-824-4184

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