ia186em Innovasic Semiconductor Inc., ia186em Datasheet - Page 99

• Manufacturer Part Number: ia186em
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
acknowledge cycle timing.
software halt cycle timing.
clock—power-save mode.
Figure 22
ready.
Figures 25
hold entering and bus hold leaving, respectively.
timing.
Figure 29
interface timing.
Table 80. AC Characteristics Over Commercial Operating Ranges (40 MHz)
General Timing Requirements
No.
General Timing Responses
10
11
12
13
14
15
16
17
18
19
20
21
22
23
80
81
82
84
1
2
3
4
5
6
8
9
tDVCL
tCLDX
tCHSV
tCLSH
tCLAV
tCLAX
tCHDX
tCHLH
tLHLL
tCHLL
tAVLL
tLLAX
tAVCH
tCLAZ
tCLCSV
tCXCSX
tCHCSX
tDXDL
tCVCTV
tCVDEX
tCHCTV
tLHAV
tCLCLX
tCLCSL
tCLRF
tLRLL
Figure 24
Name
presents the srdy—synchronous ready.
presents the synchronous serial interface.
and
26
presents the peripherals.
Data in Setup
Data in Hold
Status Active Delay
Status Inactive Delay
ad Address Valid Delay
Address Hold
Status Hold Time
ale Active Delay
ale Width
ale Inactive Delay
ad Address Valid to ale Low
ad Address Hold from ale Inactive
ad Address Valid to Clock High
ad Address Float Delay
mcs_n/pcs_n Inactive Delay
mcs_n/pcs_n Hold from Command Inactive
mcs_n/pcs_n Inactive Delay
den_n Inactive to dt/r_n Low
Control Active Delay 1
den_n Inactive Delay
Control Active Delay 2
ale High to Address Valid
lcs_n Inactive Delay
lcs_n Active Delay
clkouta High to rfsh_n Invalid
lcs_n Precharge Pulse Width
present Reset 1 and Reset 2, respectively.
®
Table 90
Figure 20
Figure 19
Description
presents the clock timing.
UNCONTROLLED WHEN PRINTED OR COPIED
presents the clock—active mode.
presents the software halt cycle.
Table 91
Page 99 of 145
IA211050831-16
Table 92
Figure 23
presents the ready and peripheral timing.
Table 93
presents the reset and bus hold
presents the ardy—asynchronous
tCLCL + tCLCH
Figures 27
presents the synchronous serial
tCLCH-5
tCLCH
tCHCL
tCLCH
Min
7.5
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 89
Figure 21
and
28
December 24, 2008
Max
http://www.Innovasic.com
12
12
12
12
12
10
10
12
present the bus
–
–
6
6
–
8
–
8
–
–
–
–
–
0
–
9
9
–
presents the
presents the
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