ia186em Innovasic Semiconductor Inc., ia186em Datasheet - Page 84

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ia186em

Manufacturer Part Number
ia186em
Description
8-bit/16-bit Microcontrollers
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
5.1.32 WDCON (044h) (Master Mode)
WatchDog Timer Interrupt CONtrol Register. These registers control the operation of the
Watchdog Timer interrupt source. The value of this register is 000Fh at reset (see Table 54).
Table 54. Watchdog Timer Interrupt Control Register
5.1.33 I4CON (040h) (Master Mode)
This register controls the operation of the int4 signal, which is only intended for use in fully
nested mode. The interrupt is assigned to type 10h. The value of the I4CON register is 000Fh at
reset (see Table 55).
Table 55. INT4 Control Register
15
15
14
14
Values of PR2–PR0 by Priority
Bits [15–5]—Reserved → Set to 0.
Bit [4]—Reserved → Set to 0.
Bit [3]—MSK Mask → This bit, when 0, enables the Watchdog Timer to cause an
interrupt. When this bit is 1 prevents the Watchdog Timer from generating an interrupt.
Bits [2–0]—PR2–PR0 Priority → These bits define the priority of the Watchdog Timer
interrupt in relation to other interrupt signals. The interrupt priority is the lowest at 7 at
reset. The values of PR2–PR0 are shown in the
Priority
(High) 0
1
2
3
4
5
6
(Low) 7
13
13
12
12
PR2–PR0
000b
001b
010b
011b
100b
101b
110b
111b
Reserved
Reserved
11
11
®
10
10
9
9
8
8
7
7
UNCONTROLLED WHEN PRINTED OR COPIED
6
6
5
5
Page 84 of 145
IA211050831-16
Reserved
LTM
4
4
MSK
3
above
MSK
3
PR2–PR0
2
table.
1
PR2–PR0
2
0
1
0
December 24, 2008
http://www.Innovasic.com
Customer Support:
Data Sheet
1-888-824-4184

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