ia186em Innovasic Semiconductor Inc., ia186em Datasheet - Page 76

• Manufacturer Part Number: ia186em
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Note: See the definitions of long and short break in
(Serial Port Status
Note: See the definitions of long and short break in
(Serial Port Status
Bit [10]—RXIE Receive Data Ready Interrupt Enable → This bit enables the generation
of an interrupt request whenever the receive register contains valid data (RDR Bit [1]).
The respective port does not generate interrupts when this bit is 0. Interrupts continue to
be generated as long as RDR and the RXIE are 1.
Bit [9]—LOOP Loop Back → The serial port is placed into the loop-back mode when
this bit is set.
Bit [8]—BRK Send Break → When this bit is set to 1, the txd pin is driven low,
overriding any data that may be in the course of being shifted out of the transmit shift
register.
Bit [7]—BRKVAL Break Value → This is the ninth data bit transmitted when in modes 2
and 3. This bit is cleared at each transmitted word and is not buffered. To transmit data
with this bit set high, the following procedure is recommended.
1. The TEMT bit in the serial port status register must go high.
2. Set the TB8 bit by writing it to the serial port control register.
3. Write the transmit character to the serial port transmit register.
– Serial port 0 is a special case. If this bit is 1, the associated pins are used for flow
Bits [6–5]—PMODE Parity Mode → When this bit is set to 1, the txd pin is driven low,
overriding any data that may be in the course of being shifted out of the transmit shift
register.
Bit [4]—WLGN Word Length → The number of bits transmitted or received in a frame is
determined by the value of this bit. When this bit is 1, the number of data bits in a frame
is 8. When 0, it is 7. This bit is 0 at reset.
Bit [3]—STP Stop Bits → This bit specifies the number of stop bits used to indicate the
end of a frame. When this bit is 1, the number of stop bits is 2. When 0, it is 1. This bit
is 0 at reset.
Bit [2]—TMODE Transmit Mode → When this bit is 1, the transmit section of the serial
port is enabled. When 0, it is disabled.
control overriding the Peripheral Chip Select signals. This bit is 0 at reset.
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Register).
Register).
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Page 76 of 145
IA211050831-16
Section 5.1.2, SPSTS
Section 5.1.2, SPSTS
December 24, 2008
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