h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 1006

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Appendix B Internal I/O Register
LPWRCR—Low-Power Control Register
Rev. 5.00 Sep 22, 2005 page 980 of 1136
REJ09B0257-0500
Direct Transition ON Flag
Note: * Always set high-speed mode when shifting to watch mode or subactive mode.
Bit
Initial value
Read/Write
0
1
When the SLEEP instruction is executed in high-speed mode or medium-speed mode, operation shifts
to sleep mode, software standby mode, or watch mode *
When the SLEEP instruction is executed in subactive mode, operation shifts to subsleep mode or
watch mode
When the SLEEP instruction is executed in high-speed mode or medium-speed mode, operation shifts
directly to subactive mode*, or shifts to sleep mode or software standby mode
When the SLEEP instruction is executed in subactive mode, operation shifts directly to high-speed
mode, or shifts to subsleep mode
Note: * Always set high-speed mode when shifting to watch mode or subactive mode.
Low-Speed ON Flag
0
1
When the SLEEP instruction is executed in high-speed mode or medium-speed mode,
operation shifts to sleep mode, software standby mode, or watch mode *
When the SLEEP instruction is executed in subactive mode, operation shifts to watch
mode or shifts directly to high-speed mode
Operation shifts to high-speed mode when watch mode is cancelled
When the SLEEP instruction is executed in high-speed mode, operation shifts to watch
mode or subactive mode
When the SLEEP instruction is executed in subactive mode, operation shifts to
subsleep mode or watch mode
Operation shifts to subactive mode when watch mode is cancelled
DTON
Noise Elimination Sampling Frequency Select
R/W
0
1
7
0
Sampling using 1/32
Sampling using 1/4
LSON
R/W
6
0
Oscillation Circuit Feedback Resistance Control Bit
0
1
When the main clock is oscillating, sets the feedback
resistance ON. When the main clock is stopped, sets
the feedback resistance OFF
Sets the feedback resistance OFF
NESEL
R/W
5
0
SUBSTP
R/W
4
0
RFCUT
R/W
H'FDEC
3
0
Subclock Enable
0
1
Note: The clock frequency after a
Frequency Multiplication Factor
0
1
Enables subclock generation
Disables subclock generation
0
1
0
1
R/W
multiplication must not exceed
the maximum operating
frequency of this LSI.
2
0
Setting prohibited
1
2
4
STC1
R/W
1
0
STC0
R/W
0
0
System

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