h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 727

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
20.7.3
When erasing flash memory, the single-block erase flowchart shown in figure 20.12 should be
followed.
The wait times after bits are set or cleared in the flash memory control register 1 (FLMCR1) and
the maximum number of erase operations (N) are shown in table 23.10 in section 23.7, Flash
Memory Characteristics.
To erase flash memory contents, make a 1-bit setting for the flash memory area to be erased in
erase block register 1 and 2 (EBR1, EBR2) at least (t
FLMCR1. Next, the watchdog timer (WDT) is set to prevent overerasing due to program
runaway, etc. Set a value greater than (t
Preparation for entering erase mode (erase setup) is performed next by setting the ESU bit in
FLMCR1. The operating mode is then switched to erase mode by setting the E bit in FLMCR1
after the elapse of at least (t
erase time. Ensure that the erase time does not exceed (t
Note: With flash memory erasing, preprogramming (setting all memory data in the memory to
be erased to all 0) is not necessary before starting the erase procedure.
Erase Mode
sesu
) µs. The time during which the E bit is set is the flash memory
se
) ms + (t
sesu
+ t
sswe
) µs after setting the SWE bit to 1 in
ce
Rev. 5.00 Sep 22, 2005 page 701 of 1136
se
) ms.
+ t
cesu
) µs as the WDT overflow period.
REJ09B0257-0500
Section 20 ROM

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