h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 757

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
21.1
The H8S/2646 Group has a built-in clock pulse generator (CPG) that generates the system clock
(φ), the bus master clock, and internal clocks.
The clock pulse generator consists of an oscillator, PLL (phase-locked loop) circuit, clock
selection circuit, medium-speed clock divider, bus master clock selection circuit, subclock
oscillator, and waveform shaping circuit. The frequency can be changed by means of the PLL
circuit in the CPG. Frequency changes are performed by software by means of settings in the
system clock control register (SCKCR) and low-power control register (LPWRCR).
21.1.1
Figure 21.1 shows a block diagram of the clock pulse generator.
EXTAL
XTAL
OSC1
OSC2
Legend:
LPWRCR:
SCKCR:
Overview
Block Diagram
Low-power control register
System clock control register
oscillator
Subclock
oscillator
System
clock
Figure 21.1 Block Diagram of Clock Pulse Generator
Section 21 Clock Pulse Generator
( 1, 2, 4)
Generation
PLL circuit
Waveform
LPWRCR
Circuit
WDT1 count clock
STC1, STC0
SUB
selection
circuit
Clock
System clock
to
Rev. 5.00 Sep 22, 2005 page 731 of 1136
pin
clock divider
Medium-
speed
supporting modules
Section 21 Clock Pulse Generator
Internal clock to
/2 to
/32
selection
SCKCR
REJ09B0257-0500
master
circuit
clock
Bus
Bus master clock
to CPU and DTC
SCK2 to SCK0

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