h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 286

• Manufacturer Part Number: h8s-2646
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 I/O Ports
• Mode 7
Port A Data Register (PADR)
PADR is an 8-bit readable/writable register that stores output data for the port A pins (PA7 to
PA0).
PADR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port A Register (PORTA)
Note: * Determined by state of pins PA7 to PA0.
PORTA is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port A pins (PA7 to PA0) must always be performed on PADR.
Reading a pin being used as an LCD driver returns an undefined value.
If a port A read is performed while PADDR bits are set to 1, the PADR values are read. If a port A
read is performed while PADDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTA contents are determined by the pin states, as
PADDR and PADR are initialized. PORTA retains its prior state in software standby mode.
Rev. 5.00 Sep 22, 2005 page 260 of 1136
REJ09B0257-0500
Bit
Initial value :
R/W
Bit
Initial value :
R/W
These function as segment pins if the values of bits SGS3 to SGS0 of LPCR, the LCD driver,
are other than B'0000. If the value of bits SGS3 to SGS0 is B'0000, setting a PADDR bit to 1
makes the corresponding port A pin an output port, and clearing a bit to 0 makes the
corresponding pin an input port.
:
:
:
:
PA7DR
R/W
PA7
— *
R
7
0
7
PA6DR
R/W
PA6
— *
R
6
0
6
PA5DR
R/W
PA5
— *
R
5
0
5
PA4DR
R/W
PA4
— *
R
4
0
4
PA3DR
R/W
PA3
— *
R
3
0
3
PA2DR
R/W
PA2
— *
R
2
0
2
PA1DR
R/W
PA1
— *
R
1
0
1
PA0DR
R/W
PA0
— *
R
0
0
0