h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 775

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bits 2 to 0—System clock select (SCK2 to SCK0): These bits select the bus master clock in
high-speed mode, medium-speed mode, and subactive mode.
Set SCK2 to SCK0 all to 0 when shifting to operation in watch mode or subactive mode.
22.2.3
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see section 21.2.2, Low-Power Control Register (LPWRCR).
Bit 2
SCK2
0
1
Bit
Initial value
R/W
Low-Power Control Register (LPWRCR)
Bit 1
SCK1
0
1
0
1
:
:
:
DTON
Bit 0
SCK0
0
1
0
1
0
1
R/W
7
0
LSON
Description
Bus master in high-speed mode
Medium-speed clock is φ/2
Medium-speed clock is φ/4
Medium-speed clock is φ/8
Medium-speed clock is φ/16
Medium-speed clock is φ/32
R/W
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
Rev. 5.00 Sep 22, 2005 page 749 of 1136
RFCUT
R/W
3
0
Section 22 Power-Down Modes
R/W
2
0
STC1
REJ09B0257-0500
R/W
1
0
(Initial value)
STC0
R/W
0
0

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