h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 663
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h8s-2646
Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2646.pdf
(1165 pages)
- Current page: 663 of 1165
- Download datasheet (6Mb)
Bits 15 to 10—Reserved: These bits cannot be read from or written to.
Bits 9 to 0—Duty (DT): Bits 9 to 0 set the PWM output duty according to the values in bits 9 to 0
in the buffer register that is transferred by a PWCYR2 compare match. A high level (or a low level
when the corresponding bit in PWPR2 is set to 1) is output from the time PWCNT2 is cleared by a
PWCYR2 compare match until a PWDTR2 compare match occurs. When all the bits are 0, there
is no high-level output period (no low-level output period when the corresponding bit in PWPR2
is set to 1).
PWCNT2
(lower 10 bits)
PWCYR2
(lower 10 bits)
PWDTR2
(lower 10 bits)
PWM output
PWCNT2
(lower 10 bits)
PWCYR2
(lower 10 bits)
PWDTR2
(lower 10 bits)
PWM output
(M = 0)
PWM output
(0
PWM output
(N
M
M)
Figure 17.7 Differences in PWM Output According to Duty Register Set Value
N)
Figure 17.6 Duty Register Compare Match (OPS = 0 in PWPR2)
0
0
1
1
(OPS = 0 in PWPR2)
N
M
Compare match
M
M–2
N
Rev. 5.00 Sep 22, 2005 page 637 of 1136
M–1
Section 17 Motor Control PWM Timer
M
N–2
REJ09B0257-0500
N–1
N–1
0
0
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