h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 162

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 6 PC Break Controller (PBC)
6.3.5
If a PC break interrupt is generated when the following operations are being performed, exception
handling is executed on completion of the specified transfer.
1. When a PC break interrupt is generated at the transfer address of an EEPMOV.B instruction:
2. When a PC break interrupt is generated at a DTC transfer address:
Rev. 5.00 Sep 22, 2005 page 136 of 1136
REJ09B0257-0500
Execution of instruction
after sleep instruction
PC break exception handling is executed after all data transfers have been completed and the
EEPMOV.B instruction has ended.
PC break exception handling is executed after the DTC has completed the specified number of
data transfers, or after data for which the DISEL bit is set to 1 has been transferred.
PC break exception
SLEEP instruction
execution
handling
PC Break Operation in Continuous Data Transfer
(A)
Figure 6.2 Operation in Power-Down Mode Transitions
Execution of instruction
after sleep instruction
PC break exception
exception handling
SLEEP instruction
Direct transition
System clock
execution
handling
subclock
(B)
Subactive
mode
Execution of instruction
oscillation settling time
after sleep instruction
PC break exception
exception handling
SLEEP instruction
Direct transition
system clock,
Subclock
execution
handling
(C)
High-speed
(medium-speed)
mode
SLEEP instruction
respective mode
Transition to
execution
(D)

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