h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 90
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h8s-2646
Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2646.pdf
(1165 pages)
- Current page: 90 of 1165
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Section 2 CPU
2.8
2.8.1
The CPU has five main processing states: the reset state, exception handling state, program
execution state, bus-released state, and power-down state. Figure 2.14 shows a diagram of the
processing states. Figure 2.15 indicates the state transitions.
Rev. 5.00 Sep 22, 2005 page 64 of 1136
REJ09B0257-0500
Note: * The power-down state also includes a medium-speed mode, module stop mode,
Processing
states
Processing States
Overview
subactive mode, subsleep mode, and watch mode.
Exception-handling
Program execution
Bus-released state
Power-down state
Figure 2.14 Processing States
The CPU and all on-chip supporting modules have been
initialized and are stopped.
A transient state in which the CPU changes the normal
processing flow in response to a reset, interrupt, or trap
instruction.
The CPU executes program instructions in sequence.
The external bus has been released in response to a bus
request signal from a bus master other than the CPU.
CPU operation is stopped
to conserve power. *
Reset state
state
state
Hardware standby
Software standby
Sleep mode
mode
mode
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