h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 139

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h8s-2646

Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
5.4
5.4.1
Interrupt operations in the H8S/2646 Group differ depending on the interrupt control mode.
NMI interrupts are accepted at all times except in the reset state and the hardware standby state. In
the case of IRQ interrupts and on-chip supporting module interrupts, an enable bit is provided for
each interrupt. Clearing an enable bit to 0 disables the corresponding interrupt request. Interrupt
sources for which the enable bits are set to 1 are controlled by the interrupt controller.
Table 5.5 shows the interrupt control modes.
The interrupt controller performs interrupt control according to the interrupt control mode set by
the INTM1 and INTM0 bits in SYSCR, the priorities set in IPR, and the masking state indicated
by the I bit in the CPU’s CCR, and bits I2 to I0 in EXR.
Table 5.5
Interrupt
Control Mode INTM1 INTM0
0
2
Interrupt Operation
Interrupt Control Modes and Interrupt Operation
Interrupt Control Modes
0
1
SYSCR
0
1
0
1
Priority Setting
Registers
IPR
Interrupt
Mask Bits
I
I2 to I0
Rev. 5.00 Sep 22, 2005 page 113 of 1136
Description
Interrupt mask control is
performed by the I bit.
Setting prohibited
8-level interrupt mask control
is performed by bits I2 to I0.
8 priority levels can be set with
IPR.
Setting prohibited
Section 5 Interrupt Controller
REJ09B0257-0500

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