h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 102
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h8s-2646
Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2646.pdf
(1165 pages)
- Current page: 102 of 1165
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Section 2 CPU
2.9.5
The external address space is accessed with an 8-bit or 16-bit data bus width in a two-state or
three-state bus cycle. In three-state access, wait states can be inserted. For further details, refer to
section 7, Bus Controller.
2.10
2.10.1
Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction. The TAS
instruction is not generated by the Renesas Technology H8S and H8/300 series C/C++ compilers.
If the TAS instruction is used as a user-defined intrinsic function, ensure that only register ER0,
ER1, ER4, or ER5 is used.
2.10.2
The BSET, BCLR, BNOT, BST and BIST instructions read data in a unit of byte, then, after bit
manipulation, they write data in a unit of byte. Therefore, caution must be exercised when
executing any of these instructions for registers and ports that include write-only bits.
The BCLR instruction can be used to clear the flag of an internal I/O register to 0. In that case, if it
is clearly known that the pertinent flag is set to 1 in an interrupt processing routine or other
processing, there is no need to read the flag in advance.
Rev. 5.00 Sep 22, 2005 page 76 of 1136
REJ09B0257-0500
External Address Space Access Timing
Usage Note
TAS Instruction
Caution to Observe when Using Bit Manipulation Instructions
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