h8s-2646 Renesas Electronics Corporation., h8s-2646 Datasheet - Page 22
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h8s-2646
Manufacturer Part Number
h8s-2646
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2646.pdf
(1165 pages)
- Current page: 22 of 1165
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20.6 On-Board Programming Modes........................................................................................ 687
20.7 Flash Memory Programming/Erasing............................................................................... 694
20.8 Protection.......................................................................................................................... 704
20.9 Flash Memory Emulation in RAM ................................................................................... 708
20.10 Interrupt Handling when Programming/Erasing Flash Memory....................................... 710
20.11 Flash Memory Programmer Mode.................................................................................... 710
20.12 Flash Memory and Power-Down States............................................................................ 725
20.13 Flash Memory Programming and Erasing Precautions..................................................... 726
Section 21 Clock Pulse Generator
21.1 Overview .......................................................................................................................... 731
21.2 Register Descriptions........................................................................................................ 732
21.3 Oscillator .......................................................................................................................... 734
21.4 PLL Circuit ....................................................................................................................... 737
Rev. 5.00 Sep 22, 2005 page xxii of xxvi
20.5.4 Erase Block Register 2 (EBR2) ........................................................................... 684
20.5.5 RAM Emulation Register (RAMER)................................................................... 685
20.5.6 Flash Memory Power Control Register (FLPWCR)............................................ 687
20.6.1 Boot Mode ........................................................................................................... 688
20.6.2 User Program Mode............................................................................................. 692
20.7.1 Program Mode ..................................................................................................... 696
20.7.2 Program-Verify Mode ......................................................................................... 697
20.7.3 Erase Mode .......................................................................................................... 701
20.7.4 Erase-Verify Mode .............................................................................................. 702
20.8.1 Hardware Protection ............................................................................................ 704
20.8.2 Software Protection ............................................................................................. 705
20.8.3 Error Protection ................................................................................................... 706
20.11.1 Socket Adapter Pin Correspondence Diagram..................................................... 711
20.11.2 Programmer Mode Operation .............................................................................. 713
20.11.3 Memory Read Mode ............................................................................................ 714
20.11.4 Auto-Program Mode............................................................................................ 718
20.11.5 Auto-Erase Mode................................................................................................. 720
20.11.6 Status Read Mode ................................................................................................ 722
20.11.7 Status Polling....................................................................................................... 723
20.11.8 Programmer Mode Transition Time .................................................................... 723
20.11.9 Notes on Memory Programming ......................................................................... 724
20.12.1 Notes on Power-Down States .............................................................................. 725
21.1.1 Block Diagram..................................................................................................... 731
21.1.2 Register Configuration......................................................................................... 732
21.2.1 System Clock Control Register (SCKCR)........................................................... 732
21.2.2 Low-Power Control Register (LPWRCR) ........................................................... 733
21.3.1 Connecting a Crystal Resonator .......................................................................... 734
.................................................................................. 731
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