MT44K16M36 MICRON [Micron Technology], MT44K16M36 Datasheet - Page 69

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MT44K16M36

Manufacturer Part Number
MT44K16M36
Description
576Mb: x18, x36 RLDRAM 3
Manufacturer
MICRON [Micron Technology]
Datasheet

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Figure 33: ZQ Calibration Timing (ZQCL and ZQCS)
ZQ Calibration Long
ZQ Calibration Short
PDF: 09005aef84003617
576mb_rldram3.pdf – Rev. B 1/12 EN
Command
Address
QVLD
QK#
CK#
DQ
QK
CK
ZQCL
MRS
T0
Notes:
NOP
T1
The ZQ calibration long (ZQCL) mode register setting is used to perform the initial cali-
bration during a power-up initialization and reset sequence. It may be loaded at any
time by the controller depending on the system environment. ZQCL triggers the cali-
bration engine inside the DRAM. After calibration is achieved, the calibrated values are
transferred from the calibration engine to the DRAM I/O, which are reflected as upda-
ted R
The DRAM is allowed a timing window defined by either
the full calibration and transfer of values. When ZQCL is issued during the initialization
sequence, the timing parameter
plete, subsequent loading of the ZQCL mode register setting requires the timing param-
eter
The ZQ calibration short (ZQCS) mode register setting is used to perform periodic cali-
brations to account for small voltage and temperature variations. The shorter timing
window is provided to perform the reduced calibration and transfer of values as defined
by timing parameter
R
fied in the ODT Temperature and Voltage Sensitivity and the Output Driver Voltage and
Temperature Sensitivity tables.
TT
1. All devices connected to the DQ bus should be held High-Z during calibration.
2. The state of QK and QK# are unknown during ZQ calibration.
3.
impedance error within 64 clock cycles, assuming the maximum sensitivities speci-
t
t ZQ
ZQoper to be satisfied.
ON
t
selected or lower until ZQ calibration is complete.
MRSC after loading the MR1 settings, QVLD output drive strength will be at the value
NOP
Ta0
init
and ODT values.
or t ZQ
oper
NOP
Ta1
t
ZQCS. ZQCS can effectively correct a minimum of 0.5% R
Valid
Valid
Ta2
69
Activities
Activities
t
Valid
Valid
ZQinit must be satisfied. When initialization is com-
Ta3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
ZQCS
MRS
Tb0
576Mb: x18, x36 RLDRAM 3
NOP
Tb1
Indicates a break in
time scale
Mode Register 1 (MR1)
t
ZQinit or
NOP
t ZQCS
Tc0
© 2011 Micron Technology, Inc. All rights reserved.
t
ZQoper to perform
NOP
Tc1
Don’t Care
or Unknown
Valid
Valid
Tc2
ON
Activ-
ities
Activ-
ities
and

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