AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 20

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AD9992_07

Manufacturer Part Number
AD9992_07
Description
12-Bit CCD Signal Processor with Precision Timing Generator
Manufacturer
AD [Analog Devices]
Datasheet
AD9992
Individual HBLK Patterns
The HBLK programmable timing shown in Figure 24 is similar
to CLPOB and PBLK; however, there is no start polarity control.
Only the toggle positions are used to designate the start and
stop positions of the blanking period. Additionally, there are
separate masking polarity controls for H1, H2, and HL that
designate the polarity of the horizontal clock signals during
the blanking period. Setting HBLKMASK_H1 high sets H1, and
therefore H3, H5, and H7, low during the blanking, as shown in
Figure 25. As with the CLPOB and PBLK signals, HBLK
registers are available in each V-sequence, allowing different
blanking signals to be used with different vertical timing
sequences.
The AD9992 supports three modes of HBLK operation. HBLK
Mode 0 supports basic operation and some support for special
HBLK patterns. HBLK Mode 1 supports pixel mixing HBLK
CLPOB
CLPOB
PROGRAMMABLE SETTINGS:
1
2
3
VD
HD
START POLARITY (CLAMP AND BLANK REGION ARE ACTIVE LOW).
FIRST TOGGLE POSITION.
SECOND TOGGLE POSITION.
PBLK
HD
1
0
1
2
2
ACTIVE
CLPMASKSTART1 = 6
3
NO CLPOB SIGNAL
FOR LINES 6 TO 8
Figure 22. Clamp and Preblank Pulse Placement
Figure 23. CLPOB Masking Example
CLPMASKEND1 = 8
Rev. C | Page 20 of 92
operation. HBLK Mode 2 supports advanced HBLK operation.
The following sections describe each mode in detail. Register
parameters are described in detail in Table 11.
HBLK Mode 0 Operation
There are six toggle positions available for HBLK. Normally,
only two of the toggle positions are used to generate the standard
HBLK interval. However, the additional toggle positions can be
used to generate special HBLK patterns, as shown in Figure 26.
The pattern in this example uses all six toggle positions to
generate two extra groups of pulses during the HBLK interval.
By changing the toggle positions, different patterns can be
created.
Separate toggle positions are available for even and odd lines. If
alternation is not needed, the same values should be loaded into
the registers for even (HBLKTOGE) and odd (HBLKTOGO) lines.
CLPMASKSTART2 = CLPMASKEND2 = 600
597 598
NO CLPOB SIGNAL
FOR LINE 600
ACTIVE

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