AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 35

• Manufacturer Part Number: AD9992_07
• Description: 12-Bit CCD Signal Processor with Precision Timing Generator
• Manufacturer: AD [Analog Devices]

Using the LASTREPLEN_EN
The LASTREPLEN_EN register (Address 0x00, Bits [19:16] in
the sequence registers) is used to enable a separate pattern
length to be used in the final repetition of several pulse
repetitions. It is recommended that the LASTREPLEN_EN
register bits be set high (enabled) and the LASTREPLEN_A,
LASTREPLEN_B, LASTREPLEN_C, and LASTREPLEN_D
registers be set to a value equal to the VLENA, VLENB,
VLENC, and VLEND register values, respectively.
Generating Line Alternation for V-Sequences and HBLK
During low resolution readout, some CCDs require a different
number of vertical clocks on alternate lines. The AD9992 can
support this by using the VREP registers. This allows a different
number of V-pattern group repetitions to be programmed on
NOTES
1. THE NUMBER OF REPEATS FOR V-PATTERN GROUPS A/B/C/D CAN BE ALTERNATED ON ODD AND EVEN LINES.
2. GROUP A ALSO SUPPORTS 3- AND 4-LINE ALTERNATION USING THE ADDITIONAL VREPA_3 AND VREPA_4 REGISTERS.
3. THE HBLK TOGGLE POSITIONS CAN BE ALTERNATED BETWEEN ODD AND EVEN LINES TO GENERATE DIFFERENT HBLK PATTERNS.
HBLK
XV24
XV1
XV2
HD
XVTOGE1
VREPA_1 = 2
(OR VREPB/C/D_EVEN = 2)
Figure 42. Odd/Even Line Alternation of V-Pattern Group Repetitions and HBLK Toggle Positions
XVTOGE2
XVTOGO1
VREPA_2 = 5
(OR VREPB/C/D_ODD = 5)
Rev. C | Page 35 of 92
odd and even lines. Only the number of repeats can be different
in odd and even lines, while the V-pattern group remains the same.
There are separate controls for the assigned Group A, Group B,
Group C, and Group D patterns. All groups can support odd and
even line alternation. Group A uses the VREPA_1 register and
the VREPA_2 register; Group B, Group C, and Group D use
the corresponding VREP_ODD register and VREP_EVEN
register. With the additional VREPA_3 register and VREPA_4
register, Group A can also support 3-line and 4-line alternation.
As discussed in the Generating HBLK Line Alternation section,
the HBLK signal can be alternated for odd and even lines. Figure 42
shows an example of V-pattern group repetition alternation
and HBLK Mode 0 alternation used together.
XVTOGO2
XVTOGE1
VREPA_1 = 2
(OR VREPB/C/D_EVEN = 2)
XVTOGE2
AD9992