AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 70

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AD9992_07

Manufacturer Part Number
AD9992_07
Description
12-Bit CCD Signal Processor with Precision Timing Generator
Manufacturer
AD [Analog Devices]
Datasheet
AD9992
HORIZONTAL SYNC IN/OUT
+3V DIGITAL I/O
VERTICAL SYNC IN/OUT
XV SUPPLY
XSUBCK OUTPUT
EXTERNAL RESET IN
EXTERNAL SYNC IN
(TO V-DRIVER)
GENERAL-PURPOSE
0.1µF
ANALOG OUTPUT FROM CCD
SERIAL INTERFACE
OUTPUTS
(FROM ASIC/DSP)
8
MASTER CLOCK INPUT
24
XSUBCK
XVVDD
IOVDD
IOVSS
VERTICAL OUTPUTS
(TO V-DRIVER)
GPO8
GPO7
GPO6
GPO5
GPO4
GPO3
GPO2
GPO1
SYNC
RSTB
XV10
XV11
XV12
XV13
XV14
XV15
XV16
XV1
XV2
XV3
XV4
XV5
XV6
XV7
XV8
XV9
VD
HD
(3V LOGIC)
A1
B2
C2
B1
B4
C1
D2
C3
E7
D3
E2
D1
E6
E5
E3
E1
F2
F3
F7
G3
F5
F6
G2
F1
G1
G5
H2
H1
G6
G7
J2
J1
3
+1.8V LDOOUT
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
Figure 80. Typical 3 V Circuit Configuration
NOT DRAWN TO SCALE
AD9992BBCZ
Rev. C | Page 70 of 92
0.1µF
0.1µF
0.1µF
+3V CLI SUPPLY
+1.8V LDO OUT
+3V H, RG SUPPLY
G11
G10
A10
B10
A11
B11
C10
D10
C11
D11
E10
E11
H11
H10
K11
K10
F11
F10
J11
J10
L11
C9
D9
G9
H9
E9
F9
12
DCLK OUTPUT
H8
H7
HVDD2
HVSS2
H6
H5
H4
H3
HVDD1
HVSS1
H2
H1
LDOIN
LDOOUT
SENSE
LDO1P8EN
LDOVSS
LDO3P2EN
NC
CPCLI
CP1P8
CPVSS
CPFCB
CPFCT
CP3P3
DRVDD
DRVSS
DATA OUTPUTS
RG TO CCD
HL TO CCD
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
+3V DIGITAL SUPPLY
H7, H8 TO CCD
H5, H6 TO CCD
H3, H4 TO CCD
H1, H2 TO CCD
+3V LDOIN
+1.8V LDOOUT TO
AVDD, TCVDD, DVDD
+3V H, RG SUPPLY
+3V, H, RG SUPPLY

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