AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 47

no-image

AD9992_07

Manufacturer Part Number
AD9992_07
Description
12-Bit CCD Signal Processor with Precision Timing Generator
Manufacturer
AD [Analog Devices]
Datasheet
SHUTTER TIMING CONTROL
The AD9992 supports the generation of electronic shuttering
(SUBCK) and also features flexible general-purpose outputs
(GPO) to control mechanical shuttering, CCD substrate bias
switching, and strobe circuitry. In the following documentation,
the terms sense gate (SG) and vertical sense gate (VSG) are used
interchangeably.
SUBSTRATE CLOCK OPERATION (SUBCK)
The CCD image exposure time is controlled by the substrate
clock signal (SUBCK), which pulses the CCD substrate to clear
out accumulated charge. The AD9992 supports three types of
electronic shuttering: normal, high precision, and low speed.
Along with the SUBCK pulse placement, the AD9992 can
accommodate different readout configurations to further
suppress the SUBCK pulses during multiple field readouts.
The SUBCK signal is a programmable string of pulses, each
occupying a line following the primary sense gate active line,
SGACTLINE1 (registers are shown in Table 21). The SUBCK
signal has programmable pulse width, line placement, and
number of pulses to accurately control the exposure time.
SUBCK: Normal Operation
By default, the AD9992 operates in the normal SUBCK
configuration, in which the SUBCK signal is pulsing in every
VD field (see Figure 56). The SUBCK pulse occurs once per
line, and the total number of repetitions within the field
determines the length of the exposure time. The SUBCK pulse
polarity and toggle positions within a line are programmable using
the SUBCK_POL and SUBCK_TOG1 registers (see Table 21).
The number of SUBCK pulses per field is programmed in the
SUBCKNUM register (Address 0x75).
As shown in Figure 56, the SUBCK pulses always begin in the line
following the SG-active line, which is specified in the SGACTLINE
registers for each field. The SUBCK_POL, SUBCK_TOG1,
SUBCK_TOG2, SUBCKNUM, and SUBCKSTARTLINE
registers are updated at the start of the line after the sensor gate
line, as described in the Updating New Register Values section.
SUBCK: High Precision Operation
High precision shuttering is used in the same manner as normal
shuttering but uses an additional register to control the last
SUBCK pulse. In this mode, the SUBCK still pulses once per
line, but the last SUBCK in the field has an additional SUBCK
pulse, whose location is determined by the SUBCKHP_TOG
registers, as shown in Figure 57. Finer resolution of the exposure
time is possible using this mode. Leaving the SUBCKHP_TOG
registers set to its maximum value (0xFFFFFF) disables the last
SUBCK pulse (default setting).
Rev. C | Page 47 of 92
SUBCK: Low Speed Operation
Normal and high precision shutter operations are used when
the exposure time is less than 1 field. For exposure times greater
than 1 field, the low speed (LS) shutter features can be used.
The AD9992 includes a field counter (primary field counter) to
regulate long exposure times. The primary field counter must
be activated (Address 0x70) to serve as the trigger for the LS
operation. The durations of the LS exposure and read are
specified by the SGMASK_NUM and SUBCKMASK_NUM
register (Address 0x74), respectively. As shown in Figure 58,
this mode suppresses the SUBCK and VSG outputs for up to
8192 fields (VD periods).
To activate an LS shutter operation, trigger the start of the exposure
by writing to the PRIMARY_ACTION register bits according to
the desired effect. When the primary counter is activated, the next
VD period becomes the first active period of the exposure for
which the VSG and SUBCK masks are applied.
Optionally, if the SUBCKMASK_SKIP1 register is enabled, the
AD9992 ignores the first VSG and SUBCK masks in subsequent
fields. This is generally desired so that the exposure time begins
in the field after the exposure operation is initiated. Figure 58
shows operation with SUBCKMASK_SKIP1 = 1.
If the PRIMARY_ACTION register is used while the
SUBCKMASK_NUM and SGMASK_NUM registers are set to 0,
the behavior of the SUBCK and VSG signals are not different
from the normal shutter or high precision shutter operations.
Therefore, the primary field counter can be used for other tasks
(described in the General-Purpose Outputs (GPOs) section)
without disrupting the normal activity. In addition, there exists
a secondary field counter that has no effect on the SUBCK and
VSG signals. These counters are described in detail in the Field
Counters section.
SUBCK Start Line
By default, the SUBCK pulses begin in the line following
SGACTLINE1. For applications where the SUBCK pulse should
be suppressed for one or more lines following the VSG line, the
SUBCKSTARTLINE register can be programmed. This register
setting delays the start of the SUBCK pulses until the specified
number of lines following SGACTLINE1.
Caution
A value of 1 should not be used in the SUBCKSTARTLINE
register. A value of 0 is used to specify the SUBCK pulses to
begin in the next line after the SG line. A value of 2 is used to
specify the SUBCK pulses to begin two lines after the SG line,
and so on.
AD9992

Related parts for AD9992_07