AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 71

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AD9992_07

Manufacturer Part Number
AD9992_07
Description
12-Bit CCD Signal Processor with Precision Timing Generator
Manufacturer
AD [Analog Devices]
Datasheet
+1.8V DIGITAL I/O
HORIZONTAL SYNC IN/OUT
VERTICAL SYNC IN/OUT
XV SUPPLY
EXTERNAL RESET IN
XSUBCK OUTPUT
EXTERNAL SYNC IN
(TO V-DRIVER)
0.1µF
GENERAL-PURPOSE
ANALOG OUTPUT FROM CCD
SERIAL INTERFACE
OUTPUTS
(FROM ASIC/DSP)
8
MASTER CLOCK INPUT
24
XSUBCK
XVVDD
IOVDD
IOVSS
VERTICAL OUTPUTS
(TOV-DRIVER)
GPO8
GPO7
GPO6
GPO5
GPO4
GPO3
GPO2
GPO1
RSTB
SYNC
XV10
XV12
XV13
XV14
XV15
XV16
XV11
XV1
XV2
XV3
XV4
XV5
XV6
XV7
XV8
XV9
Figure 82. Crystal Application Using CLI/CLO (Consult Crystal Data Sheet for Component Values)
(1.8V LOGIC)
HD
VD
Figure 81. Typical 1.8 V Circuit Configuration Using Charge Pump for HVDD and RGVDD
A1
B2
C2
B1
B4
C1
D2
C3
E7
D3
E2
D1
E6
E5
E3
E1
F2
F3
F7
G3
F5
F6
G2
F1
G1
G5
H2
H1
G6
G7
J2
J1
3
+1.8V SUPPLY
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
AD9992
5pF ~ 20pF
NOT DRAWN TO SCALE
AD9992BBCZ
K7
CLI
Rev. C | Page 71 of 92
24MHz TO 40MHz
USER DEFINED
~7MΩ
XTAL
0.1µF
K6
375Ω
CLO
5pF ~ 20pF
0.1µF
+1.8V SUPPLY
+1.8V SUPPLY
+3V CP OUTPUT
A10
B10
A11
B11
C10
D10
C11
D11
G11
G10
H11
H10
K11
K10
E10
E11
F11
F10
L11
J11
J10
C9
D9
G9
H9
E9
F9
12
DCLK OUTPUT
H8
H7
HVDD2
HVSS2
H6
H5
H4
H3
HVDD1
HVSS1
H2
H1
LDOIN
LDOOUT
SENSE
LDO1P8EN
LDOVSS
LDO3P2EN
NC
CPCLI
CP1P8
CPVSS
CPFCB
CPFCT
CP3P3
DRVDD
DRVSS
DATA OUTPUTS
RG TO CCD
HL TO CCD
0.1µF
0.1µF
0.1µF
0.1µF
3.3µF
0.1µF
+1.8V CP INPUT
+3V CP OUTPUT
+1.8V DIGITAL SUPPLY
H5, H6 TO CCD
H3, H4 TO CCD
H1, H2 TO CCD
H7, H8 TO CCD
+3V CP OUTPUT
+3V CP OUTPUT
AD9992

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