AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 37
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AD9992_07
Manufacturer Part Number
AD9992_07
Description
12-Bit CCD Signal Processor with Precision Timing Generator
Manufacturer
AD [Analog Devices]
Datasheet
1.AD9992_07.pdf
(92 pages)
- Current page: 37 of 92
- Download datasheet (2Mb)
Hold Area Using FREEZE/RESUME Registers
The FREEZE/RESUME registers can also be used to create a
hold area in which the V-outputs are temporarily held and later
continued, starting at the point where they were held. As shown
in Figure 45, this is different from the VMASK_EN register
XV10
XV1
XV8
XV9
NOTES
1. WHEN HOLD = 1 FOR ANY V-SEQUENCE GROUP, THE FREEZE AND RESUME REGISTERS ARE USED TO SPECIFY THE HOLD AREA.
2. ABOVE EXAMPLE: XV1 TO XV10 ARE ASSIGNED TO GROUP A. HOLD BIT FOR GROUP A = 1.
3. H-COUNTER FOR GROUP A (XV1 TO XV10) STOPS DURING HOLD AREA.
HD
Figure 45. Hold Area for Group A
Rev. C | Page 37 of 92
FREEZE
FOR GROUP A
HOLD AREA
because the V-outputs continue from where they stopped rather
than from where they would have been. The hold area
temporarily stops the pixel counter for the V-outputs, while the
V-masking allows the counter to continue in the masking area.
RESUME
AD9992
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