PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 102
PEB20534H-10
Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB20534H-10.pdf
(442 pages)
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Semiconductor Group
6.1.1.4
External Data Bus Width:
The EBC can operate on 8-bit or 16-bit wide external memory/peripherals. A 16-bit data
bus uses the LBI port pins LD(15:0), while an 8-bit data bus only uses LD(7:0). This
saves bus transceivers, bus routing and memory costs at the expense of transfer time.
The EBC can control byte accesses on a 16-bit data bus.
Byte accesses on a 16-bit data bus require that the upper and lower half of the memory
can be accessed individually. In this case the upper byte is selected with the LBHE
signal, while the lower byte is selected with the LA0 signal. The two bytes of the memory
can therefore be enabled independent from each other (or together when accessing
words).
Devices such as the ESCC2 also provide a BHE input and hence allow byte accesses
in 16-bit bus mode.
When reading bytes from an external 16-bit device, whole words may be read and the
EBC automatically selects the byte to be input and discards the other.
However, it must be taken care on devices, which change their state when being read,
e.g. FIFOs, interrupt status registers, etc. In this case individual bytes should be selected
using BHE and LA0.
Switching between the Bus Modes:
The EBC bus type can be switched dynamically by software between different read/write
bus transactions. However, the connected peripherals must support the selected bus
type(s) (multiplexed mode or de-multiplexed mode).
Arbitration master/slave mode according the local bus handled dynamically by the
device itself.
Programmable bus timing characteristics:
Important timing characteristics of the external bus interface have been made user
programmable to adapt to the needs of a wide range of different external bus and
memory configurations with different types of memories and/or peripherals.
The following parameters of an external bus cycle are programmable:
•
•
Memory Cycle Time
time by the width of LRD/LWR strobe signals;
LRDY Control
Programmable Bus Characteristics
Signal extends the transcation controlled by the target peripheral.
(extendable with 1...15 wait states) defines the minimum access
102
Multi Function Port (MFP)
Data Sheet 09.98
PEB 20534
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