PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 385
PEB20534H-10
Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB20534H-10.pdf
(442 pages)
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C/R…
LA…
HA1…
HA0…
Semiconductor Group
High Byte Address Compare
Significant only if 2-byte address mode has been selected. In operating
modes which provide high byte address recognition, the DSCC4
compares the high byte of a 2-byte address with the contents of two
individually programmable addresses (RADR:RAH1, RADR:RAH2) and
the fixed values FE
result of this comparison, the following bit combinations are possible:
10…RAH1 has been recognized.
00…RAH2 has been recognized.
01…broadcast address has been recognized.
If RAH1, RAH2 contain identical values, a match is indicated by ‘10’.
Command/Response
Significant only if 2-byte address mode has been selected. Value of the
C/R bit (bit in high address byte) in the received frame. The interpretation
depends on the setting of the CRI bit in the RADR register. Refer also to
the description of RADR register.
Low Byte Address Compare
Not significant in transparent and extended transparent operating mode.
the below byte address of a 2-byte address field, or the single address
byte of a 1-byte address field is compared with two addresses
(RADR:RAL1, RADR:RAL2).
0…RAL2 has been recognized.
1…RAL1 has been recognized.
According to the X.25 LAPB protocol, RAL1 is interpreted as the address
of a COMMAND frame and RAL2 is interpreted as the address of a
RESPONSE frame.
H
and FC
385
H
(broadcast address). Dependent on the
Host Memory Organization
Data Sheet 09.98
PEB 20534
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