PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 267

• Manufacturer Part Number: PEB20534H-10
• Description: DMA Supported Serial Communication Controller with 4 Channels DSCC4
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Offset Address:
Table 61
CPU Accessibility:
Reset Value:
typical usage:
Semiconductor Group
Bit 31
Bit 15
CHiFTDA
30
14
CHiFTDA:
Channel i First (Current) Transmit Descriptor Address Register
(i=3...0)
i = 3...0
The DMA controller writes the first/current address of the channel
specific transmit descriptor chain to these registers, i.e. the address of
the transmit descriptor, the DMA transmit channel i is currently working
on.
These registers are only valid, if the DMA controller is operating in Last
Descriptor Address Mode (bit CMODE set to ’1’ in register GMODE).
29
13
28
12
read/write
0000 000
Channel 0
00B0
written by DSCC4
evaluated by CPU
27
11
H
H
26
10
CHiFTDA(15:2)
Channel 1
00B4
25
9
CHiFTDA(31:16)
H
24
8
267
23
7
Channel 2
00B8
22
6
H
Detailed Register Description
21
5
20
4
Channel 3
00BC
19
(TX Channel 3...0)
3
H
Data Sheet 09.98
18
2
PEB 20534
17
1
0
16
0
0