PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 356
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PEB20534H-10
Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB20534H-10.pdf
(442 pages)
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Semiconductor Group
SSCEN
SSCMS
SSCREN
SSCBSY
SSC Enable
This bit selects whether the SSC is in ’configuration mode’ or in normal
’operation mode’. The meaning of bits 14..0 depends on the setting of
this bit:
SSCEN=’0’
SSCEN=’1’
SSC Master Select
This bit selects whether the SSC is operating in master or in slave mode.
Bit ’SSCMS’ is valid in configuration and operation mode of register
SSCCON:
SSCMS=’0’
SSCEN=’1’
SSC Receive Error Enable
This bit selects whether the SSC ignores or checks receive errors:
SSCREN
=’0’
SSCREN
=’1’
SSC Busy Status Flag
This bit indicates that a transfer is currently in process:
SSCBSY
=’0’
SSCBSY
=’1’
The SSC is in configuration mode. Bits 14..0 provide
control bits for SSC configuration.
The SSC is in normal operation mode. Bits 14..0 provide
status information bits.
The SSC is slave. Operation is performed by the shift
clock, supplied at pin MCLK (input).
The SSC is master. Operation is performed by the
internally generated shift clock which is monitored at pin
MCLK (output).
The SSC ignores receive errors.
The SSC checks receive errors.
No transfer is in process.
A transfer is currently in process.
356
Detailed Register Description
(configuration/operation mode)
(configuration mode)
(operation mode)
Data Sheet 09.98
PEB 20534
(-)
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