PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 257

• Manufacturer Part Number: PEB20534H-10
• Description: DMA Supported Serial Communication Controller with 4 Channels DSCC4
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
TFRTHRESi
(i = 0...3)
Mx_i
(i = 0...3)
Transmit FIFO Refill Threshold Channel i
These bit fields determine the channel specific Transmit FIFO Refill
Threshold for the corresponding channel i in number of DWORDs
multiplied by its respective multiplier Mi_x.
This threshold controls DMAC operation towards the Host memory.
A watermark is calculated by:
watermark = TFRTHRESH*Mi_x+1 .
As soon as the number of valid data in the transmit FIFO is less than
watermark the DMA controller requests for new data from shared
memory.
After initialization the DMAC fills the complete transmit FIFO; when the
number of data in the transmit FIFO decreases below the watermark the
transmit FIFO requests for refill. The number of data to be transferred
into the transmit FIFO is calculated by:
number=TFSIZEi-watermark .
The transmit FIFO cannot be filled when the DMA channel is in internal
HOLD state, i.e. ’HOLD’ bit has been detected (GMODE.CMODE=’0’)
or Last Descriptor Adress matches the current descriptor address
FTDA = LTDA (GMODE.CMODE=’1’).
Note: The watermark has to be equal or lower than the specified size of
Note: The minimum allowed TFRTHRESHi value for used channels is
Multiplier 2 or 4
These bits enable a multiplier 2 or 4 respectively for the corresponding
’TFRTHRESi’ value:
M2_i = ’0’
M2_i = ’1’
M4_i = ’0’
M4_i = ’1’
Note: It is recommended not to set both multiplier enable bits of one
the corresponding central transmit FIFO partition.
“1”.
channel to ’1’.
The multiplier ’by 2’ is disabled
The ’TFRTHRESi’ bit field value is multiplied by 2.
The multiplier ’by 4’ is disabled
The ’TFRTHRESi’ bit field value is multiplied by 4.
257
Detailed Register Description
Data Sheet 09.98
(TX Channel i)
(TX Channel i)
PEB 20534