ADUC702 AD [Analog Devices], ADUC702 Datasheet - Page 16

• Manufacturer Part Number: ADUC702
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

ADuC702x Series
Pin#
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
Mnemonic
P0.3/TRST/A16/ADC
P2.5/MS1
P2.6/MS2
RST
P3.4/AD4/PWM2
P3.5/AD5/PWM2
IRQ0/P0.4/CONV
IRQ1/P0.5/ADC
P2.0/PWM
P0.7/ECLK/SPM8/PLAO[4]/XCLK
XCLKO
XCLKI
P3.6/AD6/PWM
P3.7/AD7/ECLK/PLAI[15]
P2.7/MS3
P2.1/WS
P2.2/RS
P1.7/SPM7/PLAO[0]
P1.6/SPM6/PLAI[6]
IOGND
IOV
P4.0/AD8/PLAO[8]
P4.1/AD9/PLAO[9]
P1.5/SPM5/PLAI[5]/IRQ3
P1.4/SPM4/PLAI[4]/IRQ2
P1.3/SPM3/PLAI[3]
DD
TRIP
/SPM9/PLAO[5]/CONV
BUSY
TRIP
H
L
START
/PLAI[13]
/PLAI[12]
/PLAI[14]
/PLAO[2]
BUSY
/PLAO[1]
START
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
S
S
I
I
*
Rev. PrB | Page 16 of 80
Function
General Purpose Input-Output Port 0.3 / JTAG Test Port Input – Test Reset.
Debug and download access / ADC
General Purpose Input-Output Port 2.5 / External Memory select 1
General Purpose Input-Output Port 2.6 / External Memory select 2
Reset Input. (active low)
General Purpose Input-Output Port 3.4 / External Memory Interface / PWM
phase 2 high side output / Programmable Logic Array Input 12
General Purpose Input-Output Port 3.5 / External Memory Interface /PWM
phase 2 low side output / Programmable Logic Array Input Element 13
Multifunction I/O pin:
External Interrupt Request 0, active high / General Purpose Input-Output Port
0.4 / Start conversion input signal for ADC / Programmable Logic Array
Output Element 1
Multifunction I/O pin:
External Interrupt Request 1, active high / General Purpose Input-Output Port
0.5 / ADC
Serial Port Multiplexed:
General Purpose Input-Output Port 2.0 / PWM safety cut off / UART /
Programmable Logic Array Output Element 5/ Start conversion input signal
for ADC
Serial Port Multiplexed:
General Purpose Input-Output Port 0.7 / Output for External Clock signal /
UART / Programmable Logic Array Output Element 4/ Input to the internal
clock generator circuits.
Output from the crystal oscillator inverter
Input to the crystal oscillator inverter and input to the internal clock
generator circuits
General Purpose Input-Output Port 3.6 / External Memory Interface / PWM
safety cut off / Programmable Logic Array Input Element 14
General Purpose Input-Output Port 3.7/ / External Memory Interface / Output
for External Clock signal /Programmable Logic Array Input Element 15
General Purpose Input-Output Port 2.7 / External Memory select 3
General Purpose Input-Output Port 2.1 / External Memory Write Strobe
General Purpose Input-Output Port 2.2 / External Memory Read Strobe
Serial Port Multiplexed:
General Purpose Input-Output Port 1.7 / UART / SPI / Programmable Logic
Array Output Element 0
Serial Port Multiplexed:
General Purpose Input-Output Port 1.6 / UART / SPI / Programmable Logic
Array Input Element 6
Ground for GPIO. Typically connected to DGND
3.3V Supply for GPIO and input of the on-chip voltage regulator.
General Purpose Input-Output Port 4.0 / External Memory Interface /
Programmable Logic Array Output Element 8
General Purpose Input-Output Port 4.1 / External Memory Interface
/Programmable Logic Array Output Element 9
Serial Port Multiplexed:
General Purpose Input-Output Port 1.5 / UART / SPI / Programmable Logic
Array Input Element 5/ External Interrupt Request 3, active high
Serial Port Multiplexed:
General Purpose Input-Output Port 1.4 / UART / SPI / Programmable Logic
Array Input Element 4 / External Interrupt Request 2, active high
Serial Port Multiplexed:
BUSY
signal / Programmable Logic Array Output Element 2
Preliminary Technical Data
BUSY
signal output