ADUC702 AD [Analog Devices], ADUC702 Datasheet - Page 4

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ADUC702

Manufacturer Part Number
ADUC702
Description
Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
Manufacturer
AD [Analog Devices]
Datasheet

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ADuC702x Series
Parameter
ANALOG OUTPUTS
DAC AC CHARACTERISTICS
COMPARATOR
TEMPERATURE SENSOR
POWER SUPPLY MONITOR (PSM)
Watchdog Timer (WDT)
Flash/EE MEMORY
Digital Inputs
Logic Inputs
Logic Outputs
MCU CLOCK RATE
STARTUP TIME
Programmable Logic Array (PLA)
Output Impedance
Timeout Period
Endurance
Data Retention
Input Leakage Current
Input Capacitance
VINL, Input Low Voltage
VINH, Input High Voltage
At Power-On
From Idle Mode
From Power-Down Mode
Propagation Delay
Output Voltage Range_0
Ouput Voltage Range_1
Output Voltage Range_2
Voltage Output Settling Time
Voltage Output Settling Time
Digital to Analog Glitch Energy
Input Offset Voltage
Input Bias Current
Input Voltage Range
Input Capacitance
Hysteresis
Response Time
Voltage Output at 25°C
Voltage TC
Accuracy
IOV
Power Supply Trip Point Accuracy
VOH, Output High Voltage
VOL, Output Low Voltage
DD
Trip Point Selection
4
10
11
4
12
ADuC702x
0 to DACREF
0 to 2.5V
0 to DACV
10
10
15
TBD
±10
5
AGND to AV
7
5
10
1
10
TBD
-1.5
±3
2.79
3.07
±2.5
0
TBD
10,000
30
±10
±1
10
0.4
2.0
IOV
0.4
355.5
45.5
TBD
TBD
TBD
TBD
DD
– 400mV
DD
DD
-1.2
Rev. PrB | Page 4 of 80
Unit
V typ
V typ
V typ
Ω typ
µs typ
µs typ
nV-sec typ
mV
nA typ
Vmin/Vmax
pF typ
mV min
mv max
µs min
µs max
mV typ
mV/°C typ
°C typ
V
V
% max
ms min
ms max
Cycles min
Years min
µA max
µA typ
pF typ
V max
V min
V min
V max
kHz min
MHz max
ns typ
Test Conditions/Comments
DACREF range: DACGND to DACV
DAC Output buffered
DAC Output unbuffered
I LSB change at major carry
Hysteresis can be turned on or off via the
CMPHYST bit in the CMPCON register
Response time may be modified via the CMPRES
bits in the CMPCON register
Two selectable Trip Points
Of the selected nominal Trip Point Voltage
T
All digital inputs including XTAL1 and XTAL2
All Logic inputs including XTAL1 and XTAL2
I
I
8 programmable core clock selections within this
range
Core Clock = TBD MHz
From input pin to output pin
SOURCE
SINK
J
Preliminary Technical Data
= 55°C
= 1.6mA
= 1.6mA
DD

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