ADUC702 AD [Analog Devices], ADUC702 Datasheet - Page 48

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ADUC702

Manufacturer Part Number
ADUC702
Description
Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
Manufacturer
AD [Analog Devices]
Datasheet

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ADuC702x Series
8
3
2-1
0
Bit
9
8
0:7
Bit
8
7
6
5
4
3
2
1
0
PWMTRIPINT
PWMTRIP
PWMPHASE
Name
CHOPLO
CHOPHI
GDCLK
Name
0H0L_XOVR
1H1L_XOVR
2H2L_XOVR
0L_EN
0H_EN
1L_EN
1H_EN
2L_EN
2H_EN
PWM trip interrupt bit
Raw signal from the PWMTRIP pin
Reserved
PWM Phase Bit
Set to ‘1’ by the MicroConverter when the timer is counting down (1
Clear to ‘0’ by the MicroConverter when the timer is counting up (2
Description
low-side Gate Chopping enable bit
high-side Gate Chopping enable bit
PWM Gate Chopping Period (unsigned)
Description
Channel 0 Output Crossover Enable Bit
Set to ‘1’ by the user to enable channel 0 output crossover
Clear to ‘0’ by the user to disable channel 0 output crossover
Channel 1 Output Crossover Enable Bit
Set to ‘1’ by the user to enable channel 1 output crossover
Clear to ‘0’ by the user to disable channel 1 output crossover
Channel 2 Output Crossover Enable Bit
Set to ‘1’ by the user to enable channel 2 output crossover
Clear to ‘0’ by the user to disable channel 2 output crossover
AL Output Enable Bit
Set to ‘1’ by the user to disable the 0L output of the PWM
Clear to ‘0’ by the user to enable the 0L output of the PWM
AH Output Enable Bit
Set to ‘1’ by the user to disable the 0H output of the PWM
Clear to ‘0’ by the user to enable the 0H output of the PWM
BL Output Enable Bit
Set to ‘1’ by the user to disable the 1L output of the PWM
Clear to ‘0’ by the user to enable the 1L output of the PWM
BH Output Enable Bit
Set to ‘1’ by the user to disable the 1H output of the PWM
Clear to ‘0’ by the user to enable the 1H output of the PWM
CL Output Enable Bit
Set to ‘1’ by the user to disable the 2L output of the PWM
Clear to ‘0’ by the user to enable the 2L output of the PWM
CH Output Enable Bit
Set to ‘1’ by the user to disable the 2H output of the PWM
Clear to ‘0’ by the user to enable the 2H output of the PWM
Table 27: PWMCFG MMR Bit Descriptions
Table 28: PWMEN MMR bit descriptions
Rev. PrB | Page 48 of 80
Preliminary Technical Data
nd
st
half)
half)

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