AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 11
AT32UC3L064-D3HES
Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064-D3HES.pdf
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3.2.2
3.2.3
3.2.4
32099D–06/2010
Peripheral Functions
JTAG Port Connections
Nexus OCD AUX Port Connections
Each GPIO line can be assigned to one of several peripheral functions. The following table
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled.
Table 3-2.
If the JTAG is enabled, the JTAG will take control over a number of pins, irrespectively of the I/O
Controller configuration.
Table 3-3.
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the I/O Controller configuration. Two different OCD trace pin mappings are
possible, depending on the configuration of the OCD AXS register. For details, see the AVR32
UC Technical Reference Manual.
Table 3-4.
Function
A
B
C
D
E
F
G
H
Pin
EVTI_N
MDO[5]
MDO[4]
MDO[3]
48TQFP/QFN/TLLGA
Peripheral Functions
JTAG Pinout
Nexus OCD AUX Port Connections
11
14
13
4
AXS=1
PA05
PA10
PA18
PA17
Description
GPIO peripheral selection A
GPIO peripheral selection B
GPIO peripheral selection C
GPIO peripheral selection D
GPIO peripheral selection E
GPIO peripheral selection F
GPIO peripheral selection G
GPIO peripheral selection H
AXS=0
PB08
PB00
PB04
PB05
PA00
PA01
PA02
PA03
Pin
AT32UC3L016/32/64
JTAG Function
TMS
TDO
TCK
TDI
11
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