AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 172
AT32UC3L064-D3HES
Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064-D3HES.pdf
(830 pages)
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13.7.6
Name:
Access Type:
Offset:
Reset Value:
• MASK: Clock Mask
Table 13-9.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Please
refere to the UNLOCK register description for details.
32099D–06/2010
Bit
0
1
2
3
4
5
6
31
23
15
7
-
-
-
-
If bit n is written to zero, the clock divided by 2
according to the current power mode.
CLK_USART/
USART0
Divided Clock Mask
DIV
-
-
-
-
-
-
Divided Clock Mask
30
22
14
6
-
-
PBADIVMASK
Read/Write
0x040
0x0000007F
CLK_USART/
USART1
DIV
-
-
-
-
-
-
29
21
13
5
-
-
-
CLK_USART/
Table 13-9
USART2
DIV
-
-
-
-
-
-
(n+1)
28
20
12
4
-
-
-
shows what clocks are affected by the different MASK bits.
is stopped. If bit n is written to one, the clock divided by 2
CLK_USART/
USART3
DIV
MASK[6:0]
-
-
-
-
-
-
27
19
11
3
-
-
-
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
26
18
10
2
-
-
-
TC0
AT32UC3L016/32/64
-
-
-
25
17
9
1
-
-
-
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
(n+1)
TC1
is enabled
-
-
-
24
16
8
0
-
-
-
172
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